Quantum · 2 min read

IQM and Zurich Instruments Demo Real Time QEC Over NVIDIA NVQLink

IQM and Zurich Instruments announced a real time quantum error correction demonstrator pairing a 20 qubit superconducting processor, ZQCS control, and GPU accelerated decoding via NVIDIA NVQLink.

By Classy AI News · October 3, 2026

IQM and Zurich Instruments Demo Real Time QEC Over NVIDIA NVQLink

What changed

On 1 October 2026, IQM Quantum Computers and Zurich Instruments announced a joint project to build and operate a real time quantum error correction (QEC) demonstrator enabled by the NVIDIA NVQLink platform. The companies said the effort marks a milestone toward scalable, fault tolerant quantum computing aimed at enterprise and datacenter deployment.

The demonstrator combines IQM's 20 qubit superconducting quantum computer, Zurich Instruments' ZQCS Quantum Control System, and GPU accelerated classical computing over NVQLink. The integrated stack supports closed loop, low latency decoding and feedback, capabilities the partners describe as required for operating logical qubits at scale.

Zurich Instruments said the ZQCS was designed for low latency, high throughput integration with accelerated computing. NVIDIA's Tim Costa, vice president and general manager for Quantum, said the work shows that low latency, high throughput integrations between quantum processors and accelerated computing are now possible.

Why it matters

Fault tolerance depends as much on classical control speed as on qubit quality. A demonstrator that closes the loop between measurement, decode, and correction in real time is the plumbing layer capital allocators watch before betting on logical qubit roadmaps. NVQLink as the interconnect signals alignment with NVIDIA's broader quantum supercomputing stack, not a standalone lab experiment.

For enterprise buyers, the 20 qubit scale is modest, but the integration pattern is the product: control hardware, QPU, and GPU decode in one repeatable reference design.

Who is affected

Quantum hardware strategists at cloud providers, HPC centers evaluating hybrid quantum classical racks, and investors comparing superconducting vendors on control stack partnerships. Applied AI teams watching quantum plus GPU convergence should track whether NVQLink recipes port across QPUs.

What to do next

If your organization funds quantum pilots, ask vendors for closed loop latency budgets between measurement and correction, not only qubit gate fidelities. Treat this demonstrator as an integration benchmark template rather than a production machine.

What to watch

Publication of end to end latency and logical error rate metrics from the demonstrator, and whether additional QPUs adopt ZQCS plus NVQLink as a reference control stack.

Cryogenic quantum hardware in a clean laboratory setting
Figure: Superconducting QPUs require fast classical decode paths for error correction.
Engineer adjusting rack mounted control electronics
Figure: Control systems bridge qubit measurements and GPU accelerated decoders.

Sources

  1. Primary. AZoSensors / company announcement, IQM and Zurich Instruments Launch Real Time Quantum Error Correction Demonstrator with NVIDIA NVQLink (1 October 2026). Hardware stack, NVQLink role, executive quotes.
  2. Secondary. IQM Quantum Computers and Zurich Instruments joint statement as reported in the announcement (1 October 2026). Confirms 20 qubit superconducting system and ZQCS integration.

Newsletter

Get the dispatch

One field. One email when we publish. Privacy.