Breaking the 100-Qubit QFT Barrier: Q-CTRL’s Heron Demo and What It Proves About Pre-FTQC Scale

A 100-qubit Fourier transform on real hardware

Q-CTRL reported on August 10, 2026 that its researchers executed a 100-qubit Quantum Fourier Transform (QFT) on an IBM Quantum Heron r3 processor, describing the result as the largest experimental QFT on any quantum hardware to date—roughly double prior register-width benchmarks.

The QFT underpins phase estimation, factoring subroutines, and other algorithms where error accumulation and routing overhead typically cap practical scale. Q-CTRL’s team paired a compilation strategy called Convolutional QFT with active error suppression to push the subroutine past the 50-qubit demonstrations that previously marked the high end of published experimental QFT work.

Finding one frequency among 2^100 possibilities

The benchmark encoded periodic signals into registers of 50, 80, and 100 qubits—Hilbert spaces where wrong answers vastly outnumber the single target frequency the QFT must isolate. At 100 qubits, the team notes more than 10^30 incorrect outcomes against one correct integer frequency.

On Heron r3, Q-CTRL reported:

• 50-qubit selectivity: Target bitstring 8.4× more frequent than any single incorrect output; unitary process fidelity 11.4%.
• 80-qubit selectivity: Correct result 7.5× above the highest non-target outcome; process fidelity 1.8%.
• 100-qubit resolution: Correct target frequency emerged as the unique mode result across all test circuits up to 100 qubits.

Process fidelity falls as registers grow—that is expected on pre-fault-tolerant hardware—but shot averaging still resolved the target frequency at the largest scale tested.

Compilation plus error suppression

Three engineering choices drove the demonstration:

• Convolutional kernel: A single ancilla qubit compresses circuit logic into a compact gadget stepping along the register, shrinking each qubit’s causal “light cone” and reducing entangling-gate depth.
• Idle-window decoupling: Qubits outside the moving kernel receive dynamical decoupling during long idle periods, protecting states from decoherence and crosstalk.
• Rotation truncation trade-off: Smallest QFT rotations are dropped to cut noisy two-qubit gates, accepting minor synthesis error to prevent hardware noise from dominating.

The compilation achieves n² − n + 2 CX gates on IBM Heron—near the n² − n count of an ideal all-to-all architecture, limiting routing inflation on a restricted coupling graph.

What this does—and does not—prove

A 100-qubit QFT is not yet a useful factoring engine or chemistry solver on its own. It is evidence that a foundational subroutine can survive at scales where algorithm designers previously assumed only simulation was feasible.

Q-CTRL frames the work as pre-fault-tolerant progress: meaningful global information extracted from high-dimensional states before full error correction arrives. Independent replication and peer-reviewed publication of the technical manuscript will sharpen confidence intervals; the August 10 blog and associated preprint are the verified public sources today.

For IBM’s hardware program, the result also highlights Heron’s ability to maintain coherence across a 100-qubit linear chain—a layout stress test as much as an algorithmic one.

Sources

• Q-CTRL — Breaking the 100-qubit barrier: Executing the Quantum Fourier Transform at scale on IBM hardware (August 10, 2026)